ACF2/IMS interface forces DFSPBxxx security flag bit settings
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Article ID: 371550
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Updated On:
Products
ACF2 - z/OSACF2ACF2 - MISC
Issue/Introduction
This article provides a summary of how the DFSPBxxx security flag bit settings will be specified with the ACF2/IMS interface.
Resolution
SGN= Y and F are automatically forced on by ACF2.
ACF2 honors the setting of M if it is set. In other words, if SGN=M is set in the IMS Startup, ACF2 will turn that bit on. The combo SGN settings G and Z will turn on two bits one of which is the M bit which ACF2 will honor.
TRN= is forced to Y and F by ACF2.
ISIS= There are 2 bits that ACF2 looks at which are R and C. ACF2 always forces R bit off. If a RASE Exit exists, then the C bit is forced on if it is not already specified.